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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . 6 w s t e r e o c l a s s - d a u d i o p o w e r a m p l i f i e r a p a 2 6 1 3 the apa2613 is a stereo, high efficiency, class-d audio amplifier available in tssop-28pand qfn4x4-28a pins packages. the class-d power amplifier has higher efficiency com- pare to the tradition class-ab power amplifier. the filter- free class-d architecture eliminates the external low pass filters. the internal gain setting can minimum the exter- nal component counts, and for the flexible application the gain can be set to 4-step 20, 26, 32, 36db by gain control ins (gain0 and gain1). the power limit function cans protection the speaker when output signal excess the speaker limit rating. the integration of class-d power amplifier is a best so- lution for power efficiency and lower the total bom costs. the operating voltage is from 8v to 26v. the apa2613 power amplifiers are capable of driving 6 w at v dd =10v into 8 w speaker, and provides thermal and over-current protections also can detection the dc that prevent to de- stroy the speaker voice coil. f e a t u r e s g e n e r a l d e s c r i p t i o n a p p l i c a t i o n s l c d m o n i t o r a i o supply voltage is 8v ~ 26v class d operation eliminates heat sink & reduce power supply requirement 20,26, 32, 36, 4 steps gain setting 6w per channel (thd+n=10%)output power into 8 w load at 10v, class d output mono function combines two channels? output to supply 12w into a 4 w load at 12v (thd+n=10%) adjustable power limit function plus dc protec- tion thermal and over-current protections with auto- recovery option tssop-28p with thermal pad package s qfn4x4-28 with thermal pad packages s i m p l i f i e d a p p l i c a t i o n c i r c u i t apa2613 left channel input right channel input left channel speaker right channel speaker linp linn rinn rinp loutp routn loutn routp ferrite bead filter ferrite bead filter p i n c o n f i g u r a t i o n linp 3 linn 4 vclamp 9 agnd 8 gain 0 5 plimt 10 rinn 11 nc 13 sd 1 flag 2 gain 1 6 avdd 7 mono 14 rinp 12 15 rpvdd 16 rpvdd 17 rbsp 18 routp 21 rbsn 19 pgnd 20 routn 22 lbsn 23 loutn 24 pgnd 25 loutp 26 lbsp 27 lpvdd 28 lpvdd apa 2613 tssop - 28 p
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 a p a 2 6 1 3 o r d e r i n g a n d m a r k i n g i n f o r m a t i o n note : anpec lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with rohs. anpec lead-free products meet or exceed the lead-free requirements of ipc/jedec j-std-020d for msl classification at lead-free peak reflow temperature. anpec defines ?green? to mean lead-free (rohs compliant) and halogen free (br or cl does not exceed 900ppm by weight in homogeneous material and total of br and cl does not exceed 1500ppm by weight). p i n c o n f i g u r a t i o n ( c o n t . ) apa 2613 handling code temperature range package code package code r : tssop - 28 p qa : qfn 4 x 4 - 28 operating ambient temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device assembly material apa 2613 xxxxx apa 2613 r : xxxxx - date code apa 2613 xxxxx apa 2613 qa : xxxxx - date code apa 2613 qfn 4 x 4 - 28 loutp 1 lbsp 2 lpvdd 3 sd 4 flag 5 linp 6 linn 7 n c 8 g a i n 0 9 g a i n 1 1 0 a v d d 1 1 a g n d 1 2 v c l a m p 1 3 p l i m i t 1 4 15 rinn 16 rinp 17 nc 18 mono 19 rpvdd 20 rbsp 21 routp 2 2 p g n d 2 8 p g n d 2 3 r o u t n 2 4 r b s n 2 5 n c 2 6 l b s n 2 7 l o u t n
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 3 a p a 2 6 1 3 r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s symbol parameter min. max. unit v dd supply voltage 8.0 26.0 sd 2.2 - v ih high l evel t hreshold v oltage gain0, gain1, mono 2.0 - sd - 0.8 v i l low l evel t hreshold v oltage gain0, gain1, mono - 0.8 v t a ambient temperature range - 40 85 o c t j junction temperature range - 40 125 o c r l speaker resistance 3.5 - w t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja thermal resistance - junction to ambient (note 2 ) tssop - 28p qfn4x4 - 28 45 40 q j c thermal resistance - junction to case (note 3 ) tssop - 28p qfn4x4 - 28 8 7 o c /w n o t e 2 : q j a i s m e a s u r e d w i t h t h e c o m p o n e n t m o u n t e d o n a h i g h e f f e c t i v e t h e r m a l c o n d u c t i v i t y t e s t b o a r d i n f r e e a i r . t h e e x p o s e d p a d o f t s s o p - 2 8 p i s s o l d e r e d d i r e c t l y o n t h e p c b . n o t e 3 : t h e c a s e t e m p e r a t u r e i s m e a s u r e d a t t h e c e n t e r o f t h e e x p o s e d p a d o n t h e u n d e r s i d e o f t h e t s s o p - 2 8 p p a c k a g e . a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v dd supply voltage (pvdd, avdd) - 0.3 to 30 input voltage ( sd , gain0 and gain1, mono and flag ) - 0.3 to v dd +0.3 plimit - 0.3 to 6.3 v i linp, linn, rinp, rinn - 0.3 to 6.3 v t j m aximum junction temperature 150 o c t stg storage temperature range - 65 to +150 t s dr soldering temperature range , 10 seconds 260 stereo mode : v dd ?? 15v 4.8 stereo m ode : v dd ?? 15v 3.2 r l mono mode 3.2 w p d power dissipation internally limited w n o t e 1 : s t r e s s e s b e y o n d t h o s e l i s t e d u n d e r " a b s o l u t e m a x i m u m r a t i n g s " m a y c a u s e p e r m a n e n t d a m a g e t o t h e d e v i c e . t h e s e a r e s t r e s s r a t i n g s o n l y a n d f u n c t i o n a l o p e r a t i o n o f t h e d e v i c e a t t h e s e o r a n y o t h e r c o n d i t i o n s b e y o n d t h o s e i n d i c a t e d u n d e r " r e c o m - m e n d e d o p e r a t i n g c o n d i t i o n s " i s n o t i m p l i e d . e x p o s u r e t o a b s o l u t e m a x i m u m r a t i n g c o n d i t i o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t d e v i c e r e l i a b i l i t y . (over operating free-air temperature range unless otherwise noted.)
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 4 a p a 2 6 1 3 e l e c t r i c a l c h a r a c t e r i s t i c s apa2613 symbol parameter test condition s min. typ. max. unit v clamp regulated voltage i o =2ma, v dd =8~26v t j = - 40 o c ~ 125 o c 4.5 5 5.5 v v o maximum output voltage under plimit control v plimit = 1v, v l = 1vrms 4.6 5.5 6.1 t sd(on) s hutdown turn - on time sd =2 .2 v - 16 - ms t sd(off) shutdown turn - off time sd =0.8v - 2 - m s i dd quiescent supply current no load - 20 35 ma i sd quiescent supply current in shutdown mode sd = 0v - 10 100 i i input c urrent sd , gain0, gain1 , mono - 5 50 m a f osc internal oscillator frequency 400 500 60 0 khz r dson static drain - source on - state resistance v dd = 12v, i l = 0.5a - 400 - m w gain 0 = 0, gain 1 = 0 - 20 - gain 0 = 1, gain 1 = 0 - 26 - gain 0 = 0, gain 1 = 1 - 32 - a v gain gain 0 = 1, gain 1 = 1 - 36 - db v d d = 1 2 v , g n d = 0 v , a v = 3 6 d b , t a = 2 5 o c ( u n l e s s o t h e r w i s e n o t e d ) . apa2613 symbol parameter test condition s min. typ. max. unit v dd = 24 v, t a = 25 x c crosstalk channel separation v o =1vrms, f in = 1 k hz , gain = 20db - - 85 - db s n r signal - to - noise ratio maximum output at thd+n<1%, f in =1 k hz , gain = 20db, a - weighted - 95 - att shutdown shutdown attenuation f in =1 k hz , r l = 8 w , v in = 1v pp - - 100 - db i v os i offset voltage a v =20db - - 15 mv v n noise output voltage with a - weighted filter (a v = 20db) - 120 - m v (rms) v dd = 12v t a = 25 x c thd +n = 1% f in =1 k hz r l = 8 w - 7 - p o output power thd +n = 1 0 % f in =1 k hz r l = 8 w - 8.5 - w thd+n t otal harmonic distortion p lus noise f in =1 k hz r l = 8 w p o = 4w - 0.1 - % crosstalk channel separation v o =1vrms, f in = 1 k hz , gain = 20db - - 90 - s n r signal - to - noise ratio maximum output at thd+n<1%, f in =1 k hz , gain = 20db, a - weighted - 95 - att shutd own shutdown attenuation f in =1 k hz , r l = 8 w , v in = 1v pp - - 100 - db i v os i offset voltage a v =20db - - 15 mv v n noise output voltage with a - weighted filter (a v = 20db) - 120 - m v (rms) v d d = 1 2 v , g n d = 0 v , a v = 3 6 d b , t a = 2 5 o c ( u n l e s s o t h e r w i s e n o t e d ) . s t e r e o m o d e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 5 a p a 2 6 1 3 apa2613 symbol parameter test condition s min. typ. max. unit v dd = 12v t a = 25 x c thd +n = 1% f in =1 k hz r l = 4 w - 9 - p o output power thd +n = 1 0 % f in =1 k hz r l = 4 w - 12 - w thd+n t otal harmonic distortion p lus noise f in =1 k hz r l = 4 w p o = 6w - 0.1 - % s n r signal - to - noise ratio maximum output at thd+n<1%, f in =1 k hz , gain = 20db, a - weighted - 95 - att shutdown shutdown attenuation f in =1 k hz , r l = 8 w , v in = 1vrms - - 100 - db v os offset voltage a v = 20db - - 15 mv v n noise output voltage with a - we ighted filter (a v = 20db) - 120 - m v (rms) m o n o m o d e v d d = 1 2 v , g n d = 0 v , a v = 3 6 d b , t a = 2 5 o c ( u n l e s s o t h e r w i s e n o t e d ) .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 6 a p a 2 6 1 3 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s 0 . 001 10 0 . 01 0 . 1 1 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k frequency ( hz ) t h d + n ( % ) thd + n vs . frequency v dd = 12 v r l = 8 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz ) p o = 5 w p o = 2 . 5 w p o = 0 . 5 w thd + n vs . frequency t h d + n ( % ) frequency ( hz ) 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k 0 . 001 10 0 . 01 0 . 1 1 v dd = 18 v r l = 8 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz ) p o = 5 w p o = 1 w thd + n vs . frequency frequency ( hz ) 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k 0 . 001 10 0 . 01 0 . 1 1 t h d + n ( % ) v dd = 24 v r l = 8 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz ) p o = 5 w p o = 1 w frequency ( hz ) 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k thd + n vs . frequency 0 . 001 10 0 . 01 0 . 1 1 t h d + n ( % ) v dd = 12 v r l = 6 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz ) p o = 5 w p o = 2 . 5 w p o = 0 . 5 w frequency ( hz ) 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k 0 . 001 10 0 . 01 0 . 1 1 t h d + n ( % ) thd + n vs . frequency v dd = 18 v r l = 6 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz ) p o = 5 w p o = 1 w thd + n vs . frequency 0 . 001 10 0 . 01 0 . 1 1 t h d + n ( % ) frequency ( hz ) 20 20 k 50 100 200 500 1 k 2 k 5 k 10 k p o = 1 w p o = 5 w v dd = 12 v r l = 4 w c i = 1 m f gain = 20 db aes - 17 ( 20 khz )
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 7 a p a 2 6 1 3 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s output power ( w ) t h d + n ( % ) thd + n vs . output power 0 . 01 10 0 . 1 1 0 . 01 v dd = 12 v r l = 8 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) 0 . 1 1 10 f in = 10 khz f in = 1 khz f in = 20 hz thd + n vs . output power output power ( w ) t h d + n ( % ) 0 . 01 0 . 1 1 10 10 0 . 1 1 0 . 01 v dd = 18 v r l = 8 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) f in = 1 khz f in = 10 khz f in = 20 hz t h d + n ( % ) 0 . 01 0 . 1 1 10 0 . 01 10 0 . 1 1 f in = 10 khz f in = 1 khz f in = 20 hz v dd = 24 v r l = 8 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) thd + n vs . output power output power ( w ) t h d + n ( % ) thd + n vs . output power 0 . 01 0 . 1 1 10 0 . 01 10 0 . 1 1 0 . 006 v dd = 12 v r l = 6 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) f in = 10 khz f in = 1 khz f in = 20 hz output power ( w ) t h d + n ( % ) thd + n vs . output power 0 . 01 0 . 1 1 10 0 . 01 10 0 . 1 1 0 . 006 v dd = 18 v r l = 6 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) f in = 10 khz f in = 1 khz f in = 20 hz output power ( w ) output power ( w ) 0 . 01 0 . 1 1 10 0 . 01 10 0 . 1 1 t h d + n ( % ) thd + n vs . output power v dd = 12 v r l = 4 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) f in = 10 khz f in = 1 khz f in = 20 hz
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 8 a p a 2 6 1 3 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s output power ( w ) 0 . 01 0 . 1 1 10 40 t h d + n ( % ) 0 . 01 10 0 . 1 1 thd + n vs . output power r l = 4 w c i = 1 m f a v = 20 db aux - 0025 aes - 17 ( 20 khz ) mono mode vdd = 12 v vdd = 18 v vdd = 24 v frequency response g a i n ( d b ) p h a s e ( d e g r e e ) + 28 + 26 + 20 + 24 + 18 + 22 + 16 + 14 + 12 + 10 v dd = 12 v r l = 8 w p o = 0 . 6 w c i = 1 m f aux - 0025 frequency ( hz ) 20 100 k 100 1 k 10 k 20 k gain , a v = 20 db gain , a v = 26 db phase , a v = 26 db phase , a v = 20 db + 200 - 200 + 0 - 100 + 100 frequency response frequency ( hz ) 20 100 k 100 1 k 10 k 20 k g a i n ( d b ) + 38 + 36 + 30 + 34 + 28 + 32 + 26 + 24 + 22 + 20 v dd = 12 v r l = 8 w p o = 0 . 6 w c i = 1 m f aux - 0025 p h a s e ( d e g r e e ) + 200 - 200 - 100 + 100 + 0 gain , a v = 32 db gain , a v = 32 db phase , a v = 26 db phase , a v = 20 db efficiency vs . output power v dd = 12 v output power ( w ) e f f i c i e n c y ( % ) r l = 8 w + 33 m h fin = 1 khz thd + n ?? 10 % a v = 20 db aux - 0025 aes - 17 ( 20 k hz ) v dd = 24 v v dd = 18 v 0 1 2 3 4 5 6 7 8 9 10 0 10 20 30 40 50 60 70 80 90 100 efficiency vs . output power e f f i c i e n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 output power ( w ) 0 1 2 3 4 5 6 7 8 9 10 r l = 6 w + 33 m h fin = 1 khz thd + n ?? 10 % a v = 20 db aux - 0025 aes - 17 ( 20 k hz ) v dd = 12 v v dd = 18 v efficiency vs . output power e f f i c i e n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 output power ( w ) 0 1 2 3 4 5 6 7 8 9 10 r l = 4 w + 33 m h fin = 1 khz thd + n ?? 10 % a v = 20 db aux - 0025 aes - 17 ( 20 k hz ) v dd = 12 v
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 9 a p a 2 6 1 3 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s 20 20 k 100 1 k 10 k frequency ( hz ) l - channel r - channel - 50 - 120 - 110 - 100 - 90 - 80 - 70 - 60 s h u t d o w n a t t e n u a t i o n ( d b ) shutdown attenuation vs . frequency crosstalk vs . frequency - 120 + 0 - 110 - 100 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 20 20 k 100 1 k 10 k v dd = 12 v v o = 1 v r l = 8 w a v = 20 db aux - 0025 aes - 17 ( 20 k hz ) l - ch to r - ch r - ch to l - ch frequency ( hz ) c r o s s t a l k efficiency vs . output power e f f i c i e n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 output power ( w ) 0 2 4 6 8 10 12 14 16 r l = 4 w + 33 m h fin = 1 khz thd + n ?? 10 % a v = 20 db aux - 0025 aes - 17 ( 20 k hz ) mono mode v dd = 12 v v dd = 18 v psrr vs . frequency + 0 - 70 - 60 - 50 - 40 - 30 - 20 - 10 20 20 k 100 1 k 10 k frequency ( hz ) v dd = 12 v r l = 8 w a v = 20 db v rr = 0 . 2 vrms aux - 0025 aes - 17 ( 20 k hz ) l - channel r - channel p s r r ( d b ) psrr vs . frequency v dd = 12 v r l = 4 w a v = 20 db v rr = 0 . 2 vrms aux - 0025 aes - 17 ( 20 k hz ) mono mode + 0 - 70 - 60 - 50 - 40 - 30 - 20 - 10 20 20 k 100 1 k 10 k frequency ( hz ) p s r r ( d b ) supply current vs . supply voltage 0 0 2 4 8 12 16 20 24 4 6 8 10 12 14 16 18 20 22 24 26 28 30 no load supply voltage ( v ) s u p p l y c u r r e n t ( m a )
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 0 a p a 2 6 1 3 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s shutdown current vs . supply voltage 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 supply voltage ( v ) 0 1 2 3 4 5 s h u t d o w n c u r r e n t ( m a ) no load
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 1 a p a 2 6 1 3 pin no. i/o/p function tssop - 28p qfn4x4 - 28 name 1 4 sd i shutdown logic input for audio amp (low=outputs disabled, high=output enabled). ttl logic levels with compliance to avdd. 2 5 flag o protection flag output (open drain). connecting flag and sd can be set to auto - recovery. otherwise need to reset by cyding avdd 3 6 linp i positive audio input for left channel. biased at v clamp /2 . 4 7 linn i negative audio input for left channel. biased at v clamp /2 . 5 9 gain0 i gain select least significant bit. ttl logic levels with compliance to avdd. 6 10 gain1 i gain select least significant bit. ttl logic levels with compliance to avdd. 7 11 av dd p analog supply. 8 12 agnd p analog signal ground. connect to th e thermal pad. 9 13 vclamp o regulated voltage, nominal voltage is 5v. 10 14 plimit i power limit level adjust. connect a resistor divider from vclamp to gnd to set power limit. connect directly to vclamp for no power limit. 11 15 rinn i negative audio input for right channel. biased at v clamp /2 . 12 16 rinp i positive audio input for right channel. biased at v clamp /2 . 13 8, 17 nc not connected. 14 18 mono i parallel btl mode switch . 15,16 19 rpvdd p power supply for right channel h - bridge. right cha nnel and left channel power supply inputs are connect ed internally. 17 20 rbsp i bootstrap i/o for right channel, positive high - side fet. 18 21 routp o class - d h - bridge positive output for right channel. 19, 24 22, 28, 25 pgnd p power ground for the h - b ridges. 20 23 routn o class - d h - bridge negative output for right channel. 21 24 rbsn i bootstrap i/o for right channel, negative high - side fet. 22 26 lbsn i bootstrap i/o for left channel, negative high - side fet. 23 27 loutn o class - d h - bridge negative output for left channel. 25 1 loutp o class - d h - bridge positive output for left channel. 26 2 lbsp i bootstrap i/o for left channel, positive high - side fet. 27,28 3 lpvdd p power supply for left channel h - bridge. right channel and left channel power su pply inputs are connect ed internally. p i n d e s c r i p t i o n
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 2 a p a 2 6 1 3 b l o c k d i a g r a m plimit reference startup protection avdd ramp gen . sd gain 1 gain 0 pgnd gain control plimit flag vclamp linp linn plimit pwm logic mono select gain control loutp lbsp loutp fb lbsn pgnd loutn loutn fb pgnd rinn rinp plimit pwm logic mono select gain control routn rbsn routn fb rbsp pgnd routp routp fb loutp fb loutn fb routn fb routp fb ldo regulator ttl buffer dc detect uvlo / ocl o thermal detect sd detect logic biases and references vclamp ttl buffer mono mono select agnd gate drive gate drive gate drive gate drive vclamp vclamp vclamp vclamp lpvdd lpvdd rpvdd rpvdd lpvdd lpvdd rpvdd rpvdd lpvdd rpvdd
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 3 a p a 2 6 1 3 t y p i c a l a p p l i c a t i o n c i r c u i t mono linp 3 agnd 8 vclamp 9 nc 13 avdd 7 28 lpvdd right channel input signal gain setting apa 2613 shutdown control 100 m f v dd 27 lpvdd linn 4 gain 0 5 gain 1 6 plimit 10 rinn 11 rinp 12 mono 14 15 rpvdd 16 rpvdd 17 rbsp 18 routp 19 pgnd 20 routn 21 rbsn 22 lbsn 23 loutn 24 pgnd 25 loutp 26 lbsp 100 m f v dd 1 m f 1 m f 1 m f 1 m f 0 . 1 m f 0 . 1 m f 1000 pf 1000 pf 0 . 47 m f 0 . 47 m f 1000 pf 1000 pf 100 k w ( recommmanded ) 10 w bead bead 1 k w ( recommmanded ) sd 1 flag 2 stereo linp 3 agnd 8 vclamp 9 nc 13 flag 2 avdd 7 sd 1 28 lpvdd 1 m f left channel input signal right channel input signal 1 m f gain setting apa 2613 shutdown control 100 m f v dd 27 lpvdd linn 4 gain 0 5 gain 1 6 plimit 10 rinn 11 rinp 12 mono 14 15 rpvdd 16 rpvdd 17 rbsp 18 routp 19 pgnd 20 routn 21 rbsn 22 lbsn 23 loutn 24 pgnd 25 loutp 26 lbsp 100 m f v dd 1 m f 1 m f 1 m f 1 m f 1 m f 0 . 1 m f 0 . 1 m f 1000 pf 1000 pf 0 . 22 m f 0 . 22 m f 0 . 22 m f 0 . 22 m f 1000 pf 1000 pf 1000 pf 1000 pf 100 k w ( recommmanded ) 10 k w 10 k w bead bead bead bead 1 k w ( recommmanded ) 29 gnd
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 4 a p a 2 6 1 3 f u n c t i o n d e s c r i p t i o n class-d operation f i g u r e 1 . t h e a p a 2 6 1 3 o u t p u t w a v e f o r m the apa2613 uses a modulation scheme that allows operation without the classic lc reconstruction filter when the amp is driving an inductive load. each output is switch- ing from 0 volts to the supply voltage. the v outp and v outn are in phase with each other with no input so that there is little or no current in the speaker. the duty cycle of v outp is greater than 50% and v outn is less than 50% for positive output voltages. the duty cycle of v outp is less than 50% and v outn is greater than 50% for negative output voltages. the voltage across the load sits at 0v throughout most of gain setting operation the apa2613?s gain can be set by gain0, gain1. the detail gain setting value is list at table 1. shutdown operation in order to reduce power consumption while not in use, the apa2613 contains a shutdown function to externally turn off the amplifier bias circuitry. this shutdown feature turns the amplifier off when logic low is placed on the sd pin for apa2613. the trigger point between a logic high and logic low level is typically 2.2v. it is best to switch between ground and the supply voltage vdd to provide maximum device performance. by switching the sd pin to low level, the amplifier enters a low-consumption- cur- rent state, i dd for apa2613 is in shutdown mode. on nor- mal operating, apa2613?s sd pin should pull to high level to keeping the ic out of the shutdown mode. the sd pin should be tied to a definite voltage to avoid unwanted state changes. v outp v outn v out (v outp -v outn ) i out output = 0 output > 0 output < 0 v outp v outn v out (v outp -v outn ) i out v outp v outn v out (v outp -v outn ) i out the switching period, reducing the switching current, which reduces any i 2 r losses in the load. gain1 gain0 gain ri( w ) 0 0 20db 60k 0 1 26db 30k 1 0 32db 15k 1 1 36db 9k power limit operation the voltage at pin 10 can used to limit the power to levels below that which is possible based on the supply rail. add a resistor divider from vclamp to ground to set the voltage at the plimit pin. an external reference may also be used if tighter tolerance is required. also add a 1 m f capacitor from pin 10 to ground. table 1 : the gain setting
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 5 a p a 2 6 1 3 f u n c t i o n d e s c r i p t i o n ( c o n t . ) power limit operation (cont.) the plimit circuit sets a limit on the output peak-to-peak voltage. the limiting is done by limiting the duty cycle to fixed maximum value. this limit can be thought of as a ?virtual? voltage rail which is lower than the supply con- nected to pvdd. this ?virtual? rail is 5.6 times the voltage at the plimit pin. this output voltage can be used to calculate the maximum output power for a given maxi- mum input voltage and speaker impedance. v p = 5 . 6 p l i m i t v o l t a g e i f p l i m i t < 2 . 5 v vclamp supply the vclamp is used to power the gates of the output full bridge transistors. it can also be used to supply the plimit voltage divider circuit. add a 1 m f capacitor to ground at this pin. stereo/mono switching operation apa2613 offers the feature of stereo operation with two outputs of each channel connected directly. if the mono pin (pin 14) is tied high, the positive and negative outputs of each channel (left and right) are synchronized and in phase. to operate in this mono mode, apply the input signal to the right input and place the speaker between the left and right outputs. connect the positive and negative output together for best efficiency. mono mode can increase more output power compare to the stereo mode single channel?s output power. dc detect when a dc signal applies to the input of apa2613 and the time excesses 500ms, the apa2613?s dc detect fault will be reported on the flag pin as a low state. the dc detect fault will also cause the amplifier to shutdown by changing the state of the outputs to hi-z. to clear the dc detect it is necessary to cycle the pvdd supply. cycling sd will not clear a dc detect fault. . over-current protection apa2613 has protection from over-current conditions caused by a short circuit on the output stage. the short circuit protection fault is reported on the flag pin as a low state. the amplifier outputs are switched to a hi-z state when the short circuit protection latch is engaged. the latch can be cleared by cycling the sd pin through the low state. connect flag to sd pin, the over current protection will be auto recovery. thermal protection thermal protection on the apa2613 prevents damage to the device when the internal die temperature exceeds 150c. there is a 15c tolerance on this trip point from device to device. once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. this is not a latched fault. the thermal fault is cleared once the temperature of the die is reduced by 15c. the device begins normal operation at this point with no external system interaction. thermal protection faults are not reported on the flag terminal. test conditions plimit voltage max output power @ thd+n=10% pvdd=12v, rl=8 w 1.05v 2w pvdd=12v, rl=8 w 1.37v 3w pvdd=12v, rl=8 w 1.59v 4w pvdd=12v, rl=8 w 1.78v 5w pvdd=12v, rl= 4 w 0.77v 2w pvdd=12v, rl=4 w 0.96v 3w pvdd=12v, rl=4 w 1.15v 4w pvdd=1 2v, rl=4 w 1.3v 5w t a b l e 2 . p l i m i t t y p i c a l o p e r a t i o n
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 6 a p a 2 6 1 3 a p p l i c a t i o n i n f o r m a t i o n input resistance, r i changing the gain setting can vary the input resistance of the amplifier from its smallest value, 9 k w 20%, to the largest value, 60 k w 20%. as a result, if a single capaci- tor is used in the input high-pass filter, the -3 db or cutoff frequency may change when changing gain steps. input capacitor, c i in the typical application, an input capacitor c i is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. in this case, c i and the input impedance of the amplifier (r i ) form a high-pass filter with the corner frequency determined in equation 1. the value of c i is important, as it directly affects the bass (low-frequency) performance of the circuit. consider the example where r i is 60 k w and the specification calls for a flat bass response down to 20 hz. equation 1 is reconfigured as equation 2. figure 4 and figure 5 are examples for added the lc filter (butterworth), it?s recommended for the situation that the trace form amplifier to speaker is too long, and needs to eliminate the radiated emission or emi. i i ) hipass ( c c r 2 1 f p = (1) in this example, c i is 0.13 m f; so, one would likely choose a value of 0.15 m f as this value is commonly used. if the gain is known and is constant, use r i from table 1 to calculate c i . a further consideration for this capacitor is the leakage path from the input source through the input network c i and the feedback network to the load. this leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. for this reason, a low-leakage tantalum or ceramic capacitor is the best choice. when polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applica- tions as the dc level there is held at v clamp /2, which is likely higher than the source dc level. note that it is impor- tant to confirm the capacitor polarity in the application. additionally, lead-free solder can create dc offset volt- ages and it is important to ensure that boards are cleaned properly. c i i f r 2 1 c p = (2) figure 3. ferrite bead output filter figure 4. typical lc output filter, cutoff frequency of 27 khz, speaker impedance = 8 w output low-pass filter if the traces form apa2613 to speaker are short, it doesn?t require output filter for fcc & ce standard. a ferrite bead may need if it?s failing the test for fcc or ce tested without the lc filter. the figure 2 is the sample for added ferrite bead; the ferrite show choosing high im- pedance in high frequency. outn 1n f 1n f ferrite bead ferrite bead outp 4 w 1 m f 1 m f 33 m h 33 m h outn outp 8 w 2.2 m f 2.2 m f 15 m h 15 m h outn outp 4 w figure 5. typical lc output filter, cutoff frequency of 27 khz, speaker impedance = 4 w
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 7 a p a 2 6 1 3 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) bsn and bsp capactiors 1.the high frequency decoupling capacitors should be placed as close to the pvdd and avdd terminals as possible. large (100 m f or greater) bulk power supply decoupling capacitors should be placed near the apa2613 on the lpvdd and rpvdd supplies. local, high-frequency bypass capacitors should be placed as close to the pvdd pins as possible. these caps can be connected to the thermal pad directly for an excellent ground connection. consider adding a small, good quality low esr ceramic capacitor between 1000 pf and 10nf and a larger mid-frequency cap of value between 0.1 m f and 1 m f also of good quality to the pvdd connections at each end of the chip. 2.keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to pgnd as small and tight as possible. the size of this current loop determines its effectiveness as an antenna. 3.grounding?the avdd (pin 7) decoupling capacitor should be grounded to analog ground (agnd). the pvdd decoupling capacitors should connect to pgnd. analog ground and power ground should be connected at the thermal pad, which should be used as a central power-supply decoupling capacitor, c s the apa2613 is a high-performance cmos audio ampli- fier that requires adequate power supply decoupling to ensure the output total harmonic distortion (thd) is as low as possible. power supply decoupling also prevents the oscillations being caused by long lead length be- tween the amplifier and the speaker. the optimum decoupling is achieved by using two differ- ent types of capacitors that target on different types of noise on the power supply leads. for higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (esr) ceramic capacitor, typically 1 m f placed as close as possible to the device avdd pin . ground connection or star ground for the apa2613. 4.output filter?the ferrite emi filter (figure 3) should be placed as close to the output terminals as possible for the best emi performance. the lc filter (figure 4 and figure 5) should be placed close to the outputs. the capacitors used in both the ferrite and lc filters should be grounded to power ground. 5.thermal pad?the thermal pad must be soldered to the pcb for proper thermal performance and optimal reliability. the dimensions of the thermal pad and ther- mal land should be 6.46 mm by 2.35mm. seven rows of solid vias (three vias per row, 0,3302 mm or 13 mils diameter) should be equally spaced underneath the thermal land. the vias should connect to a solid cop- per plane, either on an internal layer or on the bottom layer of the pcb. the vias must be solid vias, not ther- mal relief or webbed vias. layout recommendation the full h-bridge output stages use only nmos transistors. therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. a 0. 22 m f ceramic capacitor, rated for at least 25 v, must be connected from each output to its corresponding boot- strap input. specifically, one 0.22 m f capacitor must be connected from outp to bsp, and one 0.22 m f capacitor must be connected from outn to bsn. the bootstrap capacitors connected between the bsp or bsn pins and corresponding output function as a float- ing power supply for the high-side n-channel power mosfet gate drive circuitry. during each high-side switch- ing cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side mosfets turned on. the apa2613 can be used with a small, inexpensive fer- rite bead output filter for most applications. however, since the class-d switching edges are fast, it is neces- sary to take care when planning the layout of the printed circuit board. the following suggestions will help to meet emc requirements.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 8 a p a 2 6 1 3 p a c k a g e i n f o r m a t i o n tssop-28p note : 1. followed from jedec mo-153 aet. 2. dimension "d" does not include mold flash, protrusions or gate burrs. mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. dimension "e1" does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 10 mil per side. s y m b o l min. max. 1.20 0.05 0.09 0.20 9.60 9.80 0.15 a a1 c d e e l millimeters b 0.19 0.30 0.65 bsc tssop-28p 0.45 0.75 0.026 bsc min. max. inches 0.047 0.002 0.007 0.012 0.004 0.008 0.378 0.386 0.169 0.177 0.018 0.030 0 0.006 a2 0.80 1.05 4.30 4.50 e1 0.031 0.041 4.50 d1 0.177 e2 2.50 0.098 6.00 3.50 0.236 0.138 inches 8 o 0 o 8 o 0 o 0 view a 0 . 2 5 seating plane gauge plane see view a e 1 e b c a 2 a e a 1 l e 2 expos ed pad d1 d 6.20 6.60 0.244 0.260
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 1 9 a p a 2 6 1 3 qfn4x4-28 0 . 80 0 . 098 0 . 031 0 . 002 0 . 45 bsc s y m b o l min . max . 1 . 00 0 . 00 0 . 17 0 . 27 2 . 10 2 . 50 0 . 05 2 . 10 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 20 ref qfn 4 x 4 - 28 0 . 35 0 . 45 2 . 50 0 . 008 ref min . max . inches 0 . 039 0 . 000 0 . 007 0 . 011 0 . 083 0 . 098 0 . 083 0 . 014 0 . 018 0 . 016 bsc k 0 . 20 0 . 008 3 . 90 4 . 10 0 . 154 0 . 161 3 . 90 4 . 10 0 . 154 0 . 161 pin 1 corner d 2 e 2 k l e d e pin 1 a 1 a 3 b a p a c k a g e i n f o r m a t i o n
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 0 a p a 2 6 1 3 application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 qfn4x4 - 28 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.40 4.30 ? 0.20 4.30 ? 0.20 1.30 ? 0.20 (mm) c a r r i e r t a p e & r e e l d i m e n s i o n s d e v i c e s p e r u n i t package type unit quantity qfn4x4 - 28 tape & reel 3000 h t1 a d a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 1 a p a 2 6 1 3 application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 16.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 16.0 ? 0.30 1.75 ? 0.10 7.50 ? 0.10 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tssop - 28p 4.00 ? 0.10 12.00 ? 0.10 2.00 ? 0.10 1.5+0.10 - 0.00 1.5 min. 0.6+0 .00 - 0.40 6.9 ? 0.20 10.20. ? 0.20 1.50 ? 0.20 (mm) c a r r i e r t a p e & r e e l d i m e n s i o n s d e v i c e s p e r u n i t package type unit quantity tssop - 28p tape & reel 2000 h t1 a d e 1 f w p 1 p 0 p 2 d 0 k 0 a 0 b b a d 1 b 0 a section b - b section a - a
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 2 a p a 2 6 1 3 t a p i n g d i r e c t i o n i n f o r m a t i o n tssop-28p user direction of feed q f n 4 x 4 - 2 8 user direction of feed
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 3 a p a 2 6 1 3 c l a s s i f i c a t i o n p r o f i l e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 4 a p a 2 6 1 3 profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spe cified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. c l a s s i f i c a t i o n r e f l o w p r o f i l e s table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c r e l i a b i l i t y t e s t p r o g r a m test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ t j =125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 5 - j u l . , 2 0 1 2 w w w . a n p e c . c o m . t w 2 5 a p a 2 6 1 3 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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